Digital Design with Signal Integrity verification

The routing of high speed communication boards requires signal integrity analysis to prevent overshoot or undershoot of digital signals according to 0 and 1 levels. This requires accurate impedance estimation of traces and trace groups as well as simulation of phase shifts, couplings and terminations.

We are providing analysis of existing layouts on signal integrity issues as well as layout design of high speed networks with signal integrity analysis.

 

Typical applications:

  • Microcontroller, FPGA designs
  • Cables and interface designs (GPIO, LVDS, USB, etc)
  • Mixed digital-analog layout design

EDA tools:

  • Eagle
  • Allegro
  • Pads
  • Gerber
  • Spice simulation, EM simulation in the AWR MWO, HFSS, ADS
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© Andriy Gordiyenko RF Engineering and Consulting, 2020


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